Dac Design Question

The bit depth and sample rate are not metadata. My understanding is that most DACs and ADCs use I2S serial interfaces which provide a word length pulse and a clock. It is possible to derive the sample rate and bit depth from the clock and the word length pulse.

Here are the 3 lines for a DAC interface:

1. SCK: serial clock.
2. WS: word select (0: left channel / 1: right channel - the word length pulse length may control the bit depth).
3. SD: serial data.

https://www.sparkfun.com/datasheets/BreakoutBoards/I2SBUS.pdf

I need to read more on the spec though. More related shit here:

http://www.ti.com/lit/ug/sprufx4b/sprufx4b.pdf

I think SCK may also be known as I2S_nCLK, WS as I2S_nFS, and SD as I2S_nRX in the TI datasheet.

Metadata contains song parametrics and maybe cover art. That is not something that will be provided to the DAC because it does not need it. A DAC definitively needs to know the bit depth and sample rate to work though.

As far as Schiit's implementation, it is my understanding that unlike their DS offerings, their MB offerings have sort of a proprietary approach to send data. But I would be surprised if they send metadata. They likely do and must send bit depth and sample rate information to internally configure the DACs though.

To display this info, one would need some LED drivers and possibly a POS uP. Which may add a little to the cost.

 

Sorry if the above is too technical an answer and not concise.

But in a nutshell, I believe the information is transmitted to the TEAC DAC via I2S. It is not metadata, but DAC parameters needed by the DAC to work. And Schiit likely could produce a DAC to display those parameters at their discretion and if they considered it a priority.

 

I think you are correct. The I2S data interface is likely not used to figure parameters on the fly. It just reflects the DAC configuration.

The I2S serial interface needs to be setup first.

On flagship DACs the setup seems to come from an interface IC (like Tenor, XMOS, or C-Media) though an I2C/SPI interface. On USB 1.1 entry level DACs, the setup may come directly from an integrated USB interface, and using the appropriate host driver.

The DAC I2C/SPI does not take all kinds of arbitrary data. It's used to setup the DAC registers, and likely every vendor have their own register definitions:

1. For the PCM1795, register 18's seems to control the bit depth (among other things).
2. For the CS4398, register 2's seems to control the bit depth (among other things).

An interface IC compatible with a number of DACs from a set of different vendors may have to have a means to identify the vendor and the device, and support the appropriate configuration. While I2C is standard, the registers inside a particular DAC vendor may not be. Which is probably why some of these interface ICs are proprietary and perhaps relatively pricey.

With all that said, I do not have ample experience dealing with audio interface ICs. I do have experience with I2C though.

In any case, the host drivers and the interface ICs likely do not support metadata through USB, SPDIF or other host supported interfaces. Probably just DAC configuration and data.

 

You guys are way way way way way overthinking it. Sample rate and bit depth are inherent the i2S tranmission. You have a bit clock, a word clock (denoting L or R), and a data line (multiplexed for L and R).

You feed the three lines of i2S, and either the DAC chip gets it or it barfs it up.

Think VGA with vsync, hsync, etc; except VGA is analog.

^ This.

 

Possible. It's not a big deal unless one is implementing stuff.

The sample rate and bit depth are indeed inherent in the I2S transmission. But I think some DACs do seem to need setup through I2C.

Furthermore, integrated USB 1.1 budget DACs do not have an I2S input, just USB. Many such entry level DACs do provide I2S output though, but they seem to be limited to 44.1 and 48 kHz rates.

On the other hand, there is also the pupDAC which uses the PCM2705 as interface and PCM1794 as DAC. And I don't think there is an I2C/SPI between the two. So I dunno. Maybe the default is 16-bit 44.1 and 48 kHz on power on (PCM1794), and depending on the I2S clock. And maybe I2C/SPI is a necessity only if other non-default modes are required.

 

The driver IC and the DAC share a programmable I2C/SPI interface for control. Not just I2S.

I haven't fully read the datasheets, but at least bit depth is a R/W register available through I2C/SPI on some DACs. Sample rate might be inferred for PCM operation.

 

Had to make some edits to posts above in order for them to make sense (mixed I2S and I2C wording, bit rate and bit depth ...) Sorry about that.