USB/I2S bridges (stream of conciousness)

Discussion in 'Digital: DACs, USB converters, decrapifiers' started by ultrabike, Aug 16, 2018.

  1. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    Seems you've done a bit of work with the CM6631A!

    Are you sure you can derive the required clocks from the 12 MHz one with the CM6631A?

    Does one require two I2S independent channels to talk to separate ADC and DAC chips? I know The CM6631A can support a DAC, an ADC, and maybe even a CODEC. But how about one ADC and one DAC simultaneously ala XMOS?

    I'm more interested in something like a high-end D/A A/D solution that may be augmented into a measurebator tool for less than $3000 (hopefully way less). Maybe throw in a low THD+N tone generator(s), distortion magnifiers (or whatevs), switchable attenuators maybe controlled through GPIO of the same uP that is driving the bridge... Something like that. If not possible, not possible.

    Possible this is a pipe dream.

    Worst comes to worse we forget about the I2s bridges and awesome sauce DACs and ADCs and just do a Pete Millet upgrade with low THD+N oscillators and distortion magnifiers. Maybe even throw a cheapo separate processor to handle the switches and shit.

    Possible this is a pipe dream too.
     
    Last edited: Aug 21, 2018
    Scott Kramer likes this.
  2. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    Ups! Just re-read the CM6631A datasheet. It can do two I2S simultaneously. And the right two optional crystal clocks are well supported. Well. That's what public stream of consciousness are for.

    Thanks @Scott Kramer!

    EDIT: I like the CM6632A moar bettar.
     
    Scott Kramer likes this.
  3. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    Welp, I guess one is sort of constrained by the CMedia end-user tools.

    Like I said before somewhere in this thread or elsewhere, unlike TI's Code Composer which is now free and afford full control in the development process, C51 tools are not cheap for the individual user (this has been the case for well over a decade).

    Any of you guys tried the CMedia end-user tools with success? DIYAudio had some links and even source code. But source code is sort of useless w/o a compiler, which again is a few grand.

    EDIT: It's not just the chip and how awesome the clock looks like and the pretty traces. The nice color and thickness of the board. The shinny solder and separation between the digital and analog section. The board is a brick if the bridge has no FW.

    EDIT2: I'm going through this thread from beginning to end:
    http://www.diyaudio.com/forums/digital-line-level/217764-cm6631-usb-audio-interface-22.html
    Man what a cluster fuck of FWs.
     
    Last edited: Aug 22, 2018
  4. FredM

    FredM Rando

    Joined:
    May 24, 2016
    Likes Received:
    20
    Dislikes Received:
    1
    Trophy Points:
    8
    Have you thought if an internal Singxer F1 could be an option?
    Install the card inside the DAC casework, from there connect the I2S signal directly and (if possible) powered from the DAC. The F1 still has high praises, with its XMOS chip.
     
    ultrabike likes this.
  5. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    Yes. However, on the same class of solutions, it seems the miniDSP streamer is more attractive as an XMOS solution given price and the simultaneous support for ADC and DAC.

    I need to read and review more about it because when I went briefly through the CM6631A source code, I think I saw differences between how DAC/ADC vendors handle I2S and the associated controls (sometimes through I2C). Some low rate stuff seems pretty standard. But the high end, high rate, deep bit width stuff seems a bit all over the map. Which ends up creating a market for these highly configurable bridges with their associated uP. Coaxial and Optical interface seems way more standardized.

    EDIT: See this is the deal guys. There are quite a few solutions out there. But the F/W remains a bit problematic from what I can see. There are some guys that compiled some random F/W at the DIY audio forum. But I bet those guys have Keil. I was able to get the SDCC (free 8051 compiler), but the IDE is Linux only. One can do command line. But I don't know if it will work fine with the CM6631A. The documentation from the CM6631A SDK specifically calls for Keil and particular tool version. Again, those DIY audio guys compiled their F/W. If you already have Keil this is not an issue. If you are a regular Joe, this is a bit of a lot of cash.

    It is possible to get the compiled HEX files and be done with it. But note the CM6631A micro-board solutions (and XMOS for that mater) may not offer I2C and so one is restricted to use the DACs and ADCs as is and in their default configuration. The default I2S modes for each of the devices may not be the same. There are workarounds to some extent. But also again, from a mile this is a cluster fuck. To get the most of this deal one really needs Keil unless SDCC can handle it.

    So anyone tried SDCC with this?

    BTW, I did try compiling the full library, RTOS and all with the Audio Framework for the C5535 with TI's Code Composer. Slam dunk. No problem compiling the examples either. It all compiled fine. Except the libraries require the RTOS. The whole implementation is all called from tasks. The RTOS is supported through a GUI. I don't like RTOS unless absolutely necessary. I like RTOS GUIs even less.
     
    Last edited: Aug 22, 2018
  6. Scott Kramer

    Scott Kramer Friend

    Friend
    Joined:
    May 3, 2016
    Likes Received:
    1,299
    Dislikes Received:
    4
    Trophy Points:
    93
    Heck no, I gleaned that from reading the dumbed down public datasheet... supposedly there's an NDA datasheet out there. At the time in the back of my head, knew straight i2s out of the raspberry pi preps the PCM on it's single onboard 12Mhz clock (crystal). Clean integer multiple for 48x-- but the 44.1x math has floating point error jitter built in no matter what. Paving the way for the awesome master-mode i2s on pi we have now.
     
    Last edited: Aug 22, 2018
    ultrabike likes this.
  7. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    Shit!

    It's OK. CM6631A is fine even if it has 3 oscillators attached to it. It's the development tools that are giving me a hard time. It seems a way easier device to program than the TMS and likely XMOS. I would have immediately gone for it.

    I love it. I just don't want to pay $3000 for the stupid Keil IDE. This is a fucking 8051 for crying out loud. It doesn't get cheaper and simpler than that. The core is free. Where are the free tools?!

    (As a side note, folks worry about jitter when using PLL. But I can say that one of the reasons the TMS PLL is a pain in the butt is because it seems it has a very narrow loop bandwidth which is great for jitter. But one so much as looks at it the wrong way, and the thing will not pull in. One has to carefully follow the app notes and then some. Jitter is likely very good though. Note also that we are not going to get exactly 44.1 kHz out of the TMS either. It may be relatively jitter free, but it will be off in frequency by a mosquito fart, which is also fine by me.)
     
    Last edited: Aug 22, 2018
    Scott Kramer likes this.
  8. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    OK. This I want to see!

    http://www.diyaudio.com/forums/digi...m6631-usb-audio-interface-66.html#post5369235

    Maybe this is the path to follow.

    Furthermore. From what he said, even if the F/W is shit, powering off the flash will force to boot from ROM. If this is CM6631A ROM then fucking up will not necessarily mean the end of days for the board.

    I did download the SDCC tool yesterday night. I will play around with it tonite see if it chokes or not. If the SDK relies on pre-compiled libraries, then we may need to wait for @tdtsai to kick some ass and save the day.

    (I also have another two projects that I have not completed: My cheapo 2-way speakers that have been re-routed and ready to assemble since the beginning of this year, and some ASIO code stuff to test some FIR minimum phase linear phase bullshit. Which may evolve into something even more awesome. No timelines is the awesome thing of all of this being a hobby.)
     
    Last edited: Aug 22, 2018
  9. Scott Kramer

    Scott Kramer Friend

    Friend
    Joined:
    May 3, 2016
    Likes Received:
    1,299
    Dislikes Received:
    4
    Trophy Points:
    93
    ...oh yeah, forgot... the CM663x needs a big 'ole flash chip, thats half the damn pins! When I traced the modi multibit they jumped thru hoops mapping that chip to the other side. No wonder they are working on something else.

    But that's board layout, maybe not a big deal for you. Surprised it doesn't have some onboard flash to init itself.
     
  10. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    No. Board layout is always a big deal. But not having a chip and/or F/W for it is an even bigger one.

    Can't layout if we don't know what to layout.
     
    Scott Kramer likes this.
  11. atomicbob

    atomicbob dScope Yoda

    Friend BWC MZR
    Joined:
    Sep 27, 2015
    Likes Received:
    14,611
    Dislikes Received:
    4
    Trophy Points:
    113
    Location:
    On planet
    Here are your jitter design targets for 48 KHz sample clock:

    48 KHz sample rate jitter target

    Jitter Spectrum 12 KHz - atomicbob.png

    48 KHz sample rate jitter target 20 Hz BW zoom
    Jitter Spectrum 12 KHz - atomicbob - zoom.png

    :D
     
    Scott Kramer and ultrabike like this.
  12. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    LOL! For most chips it seems the 48 kHz is no problem because it gets divided or multiplied by an integer factor. The 44.1 kHz is the question mark one.

    I have a feeling that in general the bridge will not hold things back though.

    If choosing either one of the currently only two shows in town (XMOS and CMedia), the fact that those use dedicated oscillators kind of makes the jitter issue a no issue.

    (Yeah, there is the Amanero's ARM M4 K20 based solution too - and all of their more Open Source derivatives. Both most of the reference designs selected the single I2S output device option. Who knows. Maybe that's OK.)
     
    Last edited: Aug 22, 2018
  13. atomicbob

    atomicbob dScope Yoda

    Friend BWC MZR
    Joined:
    Sep 27, 2015
    Likes Received:
    14,611
    Dislikes Received:
    4
    Trophy Points:
    113
    Location:
    On planet
    Ok, 44.1 KHz clock jitter design targets, no big deal.

    44 KHz sample rate jitter target
    Jitter Spectrum 11 KHz - atomicbob.png

    44 KHz sample rate jitter target 20 Hz BW zoom
    Jitter Spectrum 11 KHz - atomicbob - zoom.png
    :D:D


    Just don't do this (please, no):
    20180708-09 D30 SE inferred jitter - 7 KHz BW - spdif.PNG
    :rolleyes::oops:
     
    Last edited: Aug 24, 2018
  14. Dzerh

    Dzerh Friend

    Friend
    Joined:
    Apr 1, 2018
    Likes Received:
    390
    Dislikes Received:
    6
    Trophy Points:
    63
    Location:
    San Ramon, CA, US
    Sorry, for out-of-context people like me, what is "jitter design target"? And how it is correlated to real life performance of some specific PLL implementation?
     
    ultrabike likes this.
  15. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    Those "I have not jitter" plots are awesome @atomicbob. Where did they come from? What do they represent?

    Are you comparing CM6631A to XMOS jitter performance? Is one of those from a TI DSP device? Those don't look like I2S clock lines which I think are in the MHz range.

    How does this help in narrowing down a USB/I2S bridge selection?
     
    Last edited: Aug 24, 2018
  16. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    Anyways. SDCC works (C8051 free compiler). There are a few differences between how things are handled in SDCC and C51 (Keil). But the CMedia code looks relatively straight forward.

    Will give the CM663xA a shot with SDCC after some modifications to the code (as it is, the compiler complains as expected). Maybe a dead end. Maybe not.

    Lots of folks are migrating to SDCC given Keil's aggressive pricing on their compiler for an old device like an 8051.
     
  17. atomicbob

    atomicbob dScope Yoda

    Friend BWC MZR
    Joined:
    Sep 27, 2015
    Likes Received:
    14,611
    Dislikes Received:
    4
    Trophy Points:
    113
    Location:
    On planet
    Those jitter plots represent perfect performance for a 24 bit system as measured with 262144 bin FFT.
    262144 bin FFT process gain = 51.18 dB
    24 bit system range = 146.25 dB
    Total = 197.43 dB. Looks like the peaks of the noise floor on the measurements.
    One single bin at the stimulus frequency with zero side lobes to be seen anywhere up and down the spectrum.
    The measurements are digital cables tested on the dScope with a single synchronous clock for both source and receiver.

    I'm assuming your project intends to provide better performance than the typical DAC built-in USB solution. So I included a real world jitter measurement for Topping D30 with spdif input.

    I'm being a wiseass here and probably should move the plots to an appropriate thread with more information discussing jitter performance measurements. It occurred to me that few probably have seen a perfect jitter-less measurement.
     
    Dzerh likes this.
  18. ultrabike

    ultrabike Measurbator - Admin

    Staff Member Friend MZR
    Joined:
    Sep 25, 2015
    Likes Received:
    9,884
    Dislikes Received:
    20
    Trophy Points:
    113
    Location:
    Irvine CA
    There will always be side lobes. But indeed, that is a ridiculously large number of FFT points. The dScope, as expected is doing great on a primo loopback, with likely some hot kHz range signals.

    I do not have a project yet. But I do want to explore options for a USB/I2S bridge (hence the stream of consciousness thread title). Not just a DAC, but that would probably be the simplest thing.
     
    Last edited: Aug 25, 2018

Share This Page